The Future of Hardware Technologies for Computing - presented by Prof. Subhasish Mitra

The Future of Hardware Technologies for Computing

Prof. Subhasish Mitra

Prof. Subhasish Mitra
The Future of Hardware Technologies for Computing
Prof. Subhasish Mitra
Subhasish Mitra
Stanford University

The computation demands of 21st-century abundant-data workloads, such as AI/machine learning, far exceed the capabilities of today’s computing systems. For example, a Dream AI Chip would ideally co-locate all memory and compute on a single chip, quickly accessible at low energy. Such Dream Chips aren’t realizable today. Computing systems instead use large off-chip memory and spend enormous time and energy shuttling data back-and-forth. This memory wall gets worse with growing problem sizes, especially as conventional transistor miniaturization gets increasingly difficult.

The next leap in computing requires transformative NanoSystems by exploiting unique characteristics of nanotechnologies and abundant-data workloads. We create new chip architectures through ultra-dense 3D integration of logic and memory – the N3XT 3D approach. Multiple N3XT 3D chips are integrated through a continuum of chip stacking/interposer/wafer-level integration — the N3XT 3D MOSAIC. To scale with growing problem sizes, new Illusion systems orchestrate workload execution on N3XT 3D MOSAIC creating an illusion of a Dream Chip with near-Dream energy and throughput.

Several hardware prototypes, built in commercial and research fabrication facilities, demonstrate the effectiveness of our approach. We target 1,000X system-level energy-delay-product benefits, especially for abundant-data workloads. We also address new ways of ensuring robust system operation despite growing challenges of design bugs, manufacturing defects, reliability failures, and security attacks.

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NANDA Workshop 2023
HiPEDS Centre
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S. Mitra (2023, September 11), The Future of Hardware Technologies for Computing
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Video length 34:17
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