NANDA Workshop 2023

The Imperial College HiPEDS Research Centre is hosting an exciting 2-day workshop on Novel Architecture and Novel Design Automation (NANDA). The purpose of this workshop is to invite renowned experts in these areas to present their latest advances, and to provide a forum to spark new ideas.

Registration
Please register using the "Register to attend" button at the top of this page. The available options are:

• Early Full Registration (on or before 1st September) £300
• Full Registration £350
• Student Registration £150

Timetable
The workshop timetable is provisional and some talk times my change time and/or switch days.
The poster session will be at 3pm on Monday.
The NANDA dinner will be at 18:30 on the Monday evening.

NANDA 2023 website
You can find the workshop's website at nanda-workshop.org

Call for Posters
Submissions may be made at any time up to 30 August 2023. Please see here for more details.

Invited Speakers
Rob Dimond, Arm — Domain Specific Compute in the Datacentre – Opportunities and Challenges
Tobias Becker, Maxeler Technologies — Scalable Architectures for Large Language Models
Alastair Donaldson, Imperial College — Can You Trust Your Compiler? Recent Developments in Automated Testing of Compilation and Verification Tools
Kerstin Eder, University of Bristol — Energy Transparency - More Power to Software Developers!
Steve Furber, University of Manchester — Building Brains
Lachlan J. Gunn, Aalto University — Design Across Layers: Achieving More by Joining Hardware, Software, and Cryptography
Adam Hillier & Ngân Vũ, DeepMind — Learning to Design Efficient Logic Circuits
Tim Jones, University of Cambridge — ParaSol: Thread-Level Speculation for Modern High-Performance Cores
Ruby B. Lee, Princeton University — Speech-oriented Computers
Miriam Leeser, Northeastern University — Pets vs Cattle: Heterogeneous Systems in the 21st Century
Philip Leong, Sydney University — Acceleration of Cyclostationary Signal Processing Algorithms
Tom Melham, University of Oxford — Integrating Symbolic Simulation of C/C++ into a Comprehensive EDA Verification Environment
Subhasish Mitra, Stanford University — The Future of Hardware Technologies for Computing
Robert Mullins, University of Cambridge — lowRISC: Building a Digital Commons using Collaborative Engineering
Magnus Myreen, Chalmers University of Technology — First Steps in Verified Placement, Routing and Timing
Michael O’Boyle, Edinburgh University — Rethinking How We Build Compilers: Synthesis and Neural Machine Translation
Kunle Olukotun, Stanford University — Computing in the Large Language Model Era
Laura Pozzi, USI Lugano — Approximate Logic Synthesis: a New Dimension for the Synthesis of Digital Circuits
Mary Sheeran, Chalmers University of Technology — Functional Hardware Design and Verification Revisited
Jens Teubner, TU Dortmund — DB/OS Co-Design in the MxKernel Project
Ahmad Yasin, Intel — Towards a Structured Software Performance Tuning Process